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| DM74ALS125 Quad 3-STATE Buffer November 1989 Revised February 2000 DM74ALS125 Quad 3-STATE Buffer General Description This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. The 3-STATE circuitry contains a feature that maintains the buffer outputs in 3-STATE (high impedance state) during power supply ramp-up or rampdown. This eliminates bus glitching problems that arise during power-up and power-down. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs. Features s Advanced low power Schottky TTL process oxide-isolated ion-implanted s Functional and pin compatible with the 74LS counterpart s Switching response specified into 500 and 50 pF load s Switching response specifications guaranteed over full temperature and VCC supply range s PNP input design reduces input loading s Low level drive current: 74ALS = 24 mA Ordering Code: Order Number DM74ALS125M DM74ALS125N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram Logic Diagram Functional Table Y=A Input A L H X C L L H Output Y L H Hi-Z H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE (Outputs are disabled) (c) 2000 Fairchild Semiconductor Corporation DS010620 www.fairchildsemi.com DM74ALS125 Absolute Maximum Ratings(Note 1) Supply Voltage, VCC Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package 78.0C/W 111.0C/W 7V 7V 5.5V 0 to +70C -65C to +150C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Operating Free-Air Temperature 0 Parameter Min 4.5 2 0.8 -15 24 70 Typ 5 Max 5.5 Units V V V mA mA C Electrical Characteristics over recommended operating free air temperature (unless otherwise specified) Symbol VIK VOH Parameter Input Clamp Voltage HIGH Level Output Voltage VOL II IIH IIL IO IOZH IOZL ICC LOW Level Output Voltage Input Current at Max Input Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current HIGH Level 3-STATE Output Current LOW Level 3-STATE Output Current Supply Current VCC = 5.5V, VI = 7V VCC = 5.5V, VI = 2.7V VCC = 5.5V, VIL = 0.4V VCC = 5.5V, VO = 2.25V VCC = 5.5V, VO = 2.7V VCC = 5.5V, VO = 0.4V VCC = 5.5V Outputs HIGH Outputs LOW 3-STATE 7 10 13.5 -30 VCC = 4.5V to 5.5V VCC = 4.5V VCC = 4.5V Conditions VCC = 4.5V, II = -18 mA IOH = -0.4 mA IOH = -3 mA IOH = Max IOL = 12 mA IOL = 24 mA VCC - 2 2.4 2 0.25 0.35 0.4 0.5 0.1 20 -0.1 -112 20 -20 10 14 18 Min Typ Max -1.5 Units V V V V V V mA A mA mA A A mA mA mA www.fairchildsemi.com 2 DM74ALS125 Switching Characteristics Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output Output Disable Time from LOW Level Output From (Input) A A C C C C To (Output) Y Y Y Y Y Y Conditions VCC = 4.5V to 5.5V, CL = 50 pF, R1 = 500, R2 = 500, TA = Min to Max Min 3 2 2 2 1 2 Max 10 10 13 12 8 13 Units ns ns ns ns ns ns 3 www.fairchildsemi.com DM74ALS125 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M14A www.fairchildsemi.com 4 DM74ALS125 Quad 3-STATE Buffer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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